The present invention relates to semiconductor packages and more specifically relates to a process for the low cost manufacture of semiconductor packages.
Prior art power semiconductor packages typically include a housing which is frequently much larger than the semiconductor die it encapsulates. Further, in many known semiconductor device packages, heat is taken out only from one side of the die, usually the bottom surface.
Moreover, as the semiconductor die are reduced in size the size of the electrodes of the die are reduced which may increase the likelihood of failure due to solder joint degradation caused by electromigration and the like phenomenon.
In a method according to the present invention the electrodes of a semiconductor device are redistributed to larger pads, which are then used for external connection. As a result, failures resulting from the reduction in the size of electrodes can be reduced.
A method of fabricating a semiconductor package according to the present invention includes electrically and mechanically coupling one electrode on a front surface of a semiconductor die to one portion of a lead frame with a conductive adhesive body, providing overmolding for the semiconductor die, and removing at least a portion of the semiconductor die from the back surface thereof to a desired thickness.
In one embodiment of the present invention the lead frame includes a recess in which the semiconductor die is at least partially received, and the back surface of the die is plated to include a metallic body serving as a connection lead to the back surface of the die. The lead frame portion so coupled to the electrode of the semiconductor then serves a redistributed pad or lead for the die. The lead may have a connection surface coplanar with the plated metallic body, whereby all connection surfaces are disposed on the same plane for ease of mounting onto a circuit board or the like.
In another embodiment of the present invention the lead frame may be a flat metallic web such as a thick copper plate, which includes at least one portion defined by a passivation body for coupling to the electrode of the semiconductor die. The portion so defined is then patterned (isolated from the remaining body of the plate) to serve as the redistributed pad or lead for the semiconductor die. Similar to the first embodiment, the back of the die can be provided through plating or the like process with a metallic body.
Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.